6VXE7+
4-13
4.7. CHIPSET FEATURES SETUP
Figure 4.4: Chipset Features Setup
• Top Performance
The default value is Disabled.
Enabled
Enabled Top Performance.
Disabled Disabled Top Performance. (Default)
•
SDRAM Cycle Length
The default value is 3.
Auto Set SDRAM Cycle Length is Auto
3 For Slower SDRAM DIMM module.
2 For Fastest SDRAM DIMM module.
• DRAM Clock
The default value is Host CLK
CPU CLK DRAM CLK
Host CLK 66,75,83
Host CLK +33M
100,112,124,133,140,150 Host CLK.
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